For design of semiconductor integrated circuits (hereinafter also referred to as large scale integration (LSI)), there has been a technology of generating a register transfer level (RTL) describing behaviors of combined circuits of registers (flip-flops) by using a hardware description language.
In recent years, the circuit size of integrated circuits has been growing, and significant time is required for generation of the RTL.
Thus, a technology of automatically generating an RTL by using a high-level language such as the C language, the C++ language, and the System C language, which are more abstract than the RTL, has been proposed.
In addition, tools for generating an RTL from a high-level language are commercially available as high-level synthesis tools.
Behavioral description only describes the specification of behaviors but does not describe the specification on implementation.
Owing to general constraints in high-level synthesis, however, behavioral description may affect the implementation to be obtained as a result of the behavioral description depending on the manner in which the behavioral description is described.
For example, array variables in behavioral description are generally allocated to functional modules of a storage device such as a memory or a register (functional modules of a storage device will hereinafter be referred to as memory modules) in high-level synthesis.
Since an array variable is often described in a large size, an array variable is also allocated to a memory module of a large size in high-level synthesis.
Owing to the allocation to memory modules of large sizes in the high-level synthesis, a memory (hardware) having a large size may be allocated, which may increase the area of the LSI to be designed.
Typically, such a large memory is implemented by an external memory outside of the LSI to be designed.
With the current high-level synthesis tools, however, a specific memory module cannot be automatically allocated to an external memory.
Thus, in order to obtain an architecture in which a specific memory module is implemented by an external memory, the designer himself/herself needs to modify the behavioral description and describe a communication interface between the LSI and the external memory.
For example, Patent Literature 1 discloses a method of automatically generating a communication interface between an LSI and an external memory by providing the behavioral description created by the designer with configuration information of hardware to be designed (whether or not an external memory is present) and mapping information (specification of allocation of an array variable in the behavioral description to an external memory) without modifying the behavioral description by the designer.